In Study 2, when a simulation is run with trace TrazaU for the combined cache, the total number of misses in cache is:
8 10 0,25 2.
Based on what you have observed analyzing trace S, in the accesses to data of this trace:
a. There exists temporal locality but not spatial locality
b. There exists spatial locality but not temporal locality c. There is no locality at all d. There exist spatial and temporal localities
.
In Study 1, the number of sets in L1 is: a. 16 Ksets b. 8 Ksets c. 4 Ksets d. 2 Ksets.
In Study 2, when a simulation is run with TrazaS for the split cache, the total number of compulsory misses is:
a. 0 b. 2 c. 5 d. 8.
Based on what you have observed analyzing trace S, in the accesses to instruction of this trace: a. There exist spatial and temporal localities b. There exists temporal locality but not spatial locality c. There is no locality at all d. There exists spatial locality but not temporal locality.
In Study 2, when a simulation is run with TrazaS for the split cache, the total number of capacity misses is: a. 0 b. 2 c. 8 d. 5.
In Study 1, when a simulation is run with TrazaL for the multilevel cache, the number of capacity misses in cache L2 is: a. 4 b. 6 c. 0 d. 2.
In Study 2, from the point of view of the access to the instruction cache, the width (in bits) of the index field of the
memory addresses is: a. 13 bits b. 16 bits c. 12 bits d. 4 bits.
In Study 1, when a simulation is run with TrazaL for the multilevel cache, the number of capacity misses in cache L1 is:
a. 2 b. 6 c. 4 d. 0.
In Study 2, when a simulation is run with TrazaU for the split cache, the total number of compulsory misses is:
a. 8 b. 0 c. 4 d. 2.
In Study 2, when a simulation is run with TrazaS for the split cache, the total number of compulsory misses is:
a. 5 b. 2 c. 0 d. 8.
In Study 1, when a simulation is run with TrazaL for the multilevel cache, the number of compulsory misses in cache L1 is: a. 2 b. 4 c. 0 d. 6.
In Study 1, when a simulation is run with TrazaL for the multilevel cache, the number of conflict misses in cache L1 is: a. 0 b. 4 c. 6 d. 2.
In Study 2, from the point of view of the access to the data cache, the width (in bits) of the index field of the memory addresses is: a. 13 bits b. 4 bits c. 16 bits d. 12 bits.
In Study 1, cache L2 will have a local miss rate better than the local miss rate of cache L1: a. Never b. Depending on the trace c. Depending on the access time to L2 d. Always
.
In Study 1, the number of sets in L2 is:
a. 8 Ksets b. 2 Ksets c. 4 Ksets d. 16 Ksets.
In Study 2, there will be fewer misses in the instructions cache than in the data cache: a. Always b. Depending on the access time to cache c. Depending on the trace d. Never.
In Study 1, from the point of view of the access to L1, the width (in bits) of the index field of the memory addresses is: a. 17 bits b. 12 bits c. 11 bits d. 4 bits.
In Study 2, when a simulation is run with TrazaS for the combined cache, the number of capacity misses is: a. 5 b. 8 c. 2 d. 0.
In Study 2, when a simulation is run with TrazaU for the split cache, the total number of conflict misses is: a. 0 b. 6 c. 2 d. 8.
In Study 1, the number of blocks in L1 is: a. 2 Kblocks b. 8 Kblocks c. 4 Kblocks d. 16 Kblocks.
In Study 2, from the point of view of the access to the combined cache, the width (in bits) of the index field of the
memory addresses is: a. 13 bits b. 15 bits c. 12 bits d. 4 bits.
In Study 2, when a simulation is run with TrazaS for the combined cache, the number of conflict misses is: a. 8 b. 1 c. 3 d. 2.
Based on what you have observed analyzing trace L, in the accesses to data of this trace: a. There exist spatial and temporal localities b. There exists temporal locality but not spatial locality c. There is no locality at all d. There exists spatial locality but not temporal locality.
In Study 1, when a simulation is run with trace TrazaL for the multilevel cache, the resulting local miss rate (range 0 to 1) of
the cache L2 is: a. 0,1 b. 0,6 c. 0,4 d. 1.
In Study 1, the number of blocks in L2 is: a. 4 Kblocks
b. 2 Kblocks
c. 8 Kblocks
d. 16 Kblocks
.
In Study 2, when a simulation is run with TrazaU for the combined cache, the number of conflict misses is: a. 2 b. 1 c. 3 d. 0.
In Study 2, the number of blocks in the data cache is: a. 8 Kblocks b. 2 Kblocks c. 16 Kblocks d. 4 Kblocks.
In Study 1, when the multilevel cache is simulated with TrazaL, the reasons for the second cache level solving many of the misses that happen in the first lever are: a. Many misses in L1 are solved in L2 because L2 is larger than L1, but L2 could have the same degree of associativity as L1 and solve the misses equally b. Many misses in L1 are solved in L2 because L2 is larger than L1, and because the degree of associativity of L2 is twice the degree of associativity of L1 c. Many misses in L1 are solved in L2 because the degree of associativity of L2 is twice the degree of associativity of L1, but L2 could have the same size of L1 and solve the misses equally d. Many misses in L1 are solved in L2 because L2 is larger than L1, and because blocks are larger in L2.
In Study 2, when a simulation is run with TrazaU for the combined cache, the number of capacity misses is: a. 2 b. 3 c. 1 d. 0.
In Study 1, when a simulation is run with TrazaL for the single-level cache, the number of capacity misses is: a. 2 b. 4 c. 5 d. 0.
Based on what you have observed analyzing trace U, in the accesses to data of this trace:
a. There exists temporal locality but not spatial locality
b. There are no accesses to data in trace U c. There exists spatial locality but not temporal locality
d. There exist spatial and temporal localities
.
In Study 1, when a simulation is run with TrazaL for the single-level cache, the number of capacity misses is:
a. 4 b. 5 c. 0 d. 2.
In Study 1, the number of sets in L2 is:
a. 8 Ksets
b. 4 Ksets
c. 16 Ksets
d. 2 Ksets
.
In Study 2, when a simulation is run with TrazaU for the split cache, the total number of capacity misses is:
a. 8 b. 4 c. 2 d. 0.
In Study 1, when a simulation is run with TrazaL for the single-level cache, the number of compulsory misses is:
a. 5 b. 4 c. 10 d. 2.
In Study 1, when the multilevel cache is simulated with TrazaL, L2 is able to solve many of the misses that happen in L1
because: a. The higher degree of asociativity of L2 solves conflict misses in L1
b. The higher degree of asociativity of L2 improves the access time to L1
c. The higher degree of asociativity of L2 solves capacity misses in L1
d. The higher degree of asociativity of L2 solves compulsory misses in L1
.
In Study 1, when the multilevel cache is simulated with TrazaL, the reasons for the second cache level solving many of the
misses that happen in the first level are:
a. Many misses in L1 are solved in L2 because L2 is larger than L1, and because blocks are larger in L2
b. Many misses in L1 are solved in L2 because L2 is larger than L1, and because the degree of associativity of L2 is
twice the degree of associativity of L1 c. Many misses in L1 are solved in L2 because the degree of associativity of L2 is twice the degree of associativity of
L1, but L2 could have the same size of L1 and solve the misses equally
d. Many misses in L1 are solved in L2 because L2 is larger than L1, but L2 could have the same degree of
associativity as L1 and solve the misses equally.
In Study 2, when a simulation is run with trace TrazaS for the combined cache, the total number of misses in cache is:
a. 8 b. 2 c. 0,25 d. 10 .
Based on what you have observed analyzing trace L, in the accesses to instruction of this trace:
a. There is no locality at all
b. There exists temporal locality but not spatial locality
c. There exists spatial locality but not temporal locality
d. There exist spatial and temporal localities
.
In Study 2, when a simulation is run with trace TrazaU for the split cache, the total number of misses in cache is:
a. 0,5 b. 10 c. 8 d. 2.
Based on what you have observed analyzing trace S, in the accesses to data of this trace:
a. There exist spatial and temporal localities
b. There exists spatial locality but not temporal locality
c. There exists temporal locality but not spatial locality
d. There is no locality at all
.
Based on what you have observed analyzing trace U, in the accesses to data of this trace:
a. There exists temporal locality but not spatial locality
b. There are no accesses to data in trace U
c. There exists spatial locality but not temporal locality
d. There exist spatial and temporal localities
.
In Study 2, when simulating with TrazaS, the split cache is able to solve many of the misses that happen in the combined
cache because: a. Splitting the cache allows to exploit better the temporal locality of the data and the temporal locality of the
instructions
b. Splitting the cache allows to exploit better the spatial locality of the data and the temporal locality of the
instructions c. Splitting the cache allows to exploit better the spatial locality of the data and the spatial locality of the
instructions
d. Splitting the cache allows to exploit better the temporal locality of the data and the spatial locality of the
instructions.
In Study 1, when a simulation is run with TrazaL for the multilevel cache, the number of compulsory misses in cache L2 is:
a. 6 b. 0 c. 4 d. 2.
In Study 1, when a simulation is run with TrazaL for the single-level cache, the number of conflict misses is:
a. 0 b. 6 c. 5 d. 2.
In Study 2, the reasons for TrazaU making the combined cache performing better than the split cache are:
a. The combined cache has a higher degree of associativity than the two caches in the split cache, hence the
number of conflicts is reduced in the trace accesses b. The combined cache contains more blocks than the data cache in the split cache, hence the number of conflicts
is reduced in the accesses to data c. The combined cache contains more blocks than the intructions cache in the split cache, hence the number of
compulsory misses is reduced in the accesses to instructions d. The combined cache contains more blocks than the instructions cache in the split cache, hence the number of
conflicts is reduced in the accesses to instruction.
Based on what you have observed analyzing trace U, in the accesses
to instruction of this trace: There exist spatial and temporal localities. || Existe localidad
espacial y temporal. VACIO.
In Study 2, when a simulation is run with TrazaS for the split cache,
the total number of conflict misses is:
0 VACIO.
In Study 2, when simulating with TrazaU, the combined cache is able to solve many of the misses that happen in the split cache because:
The higher size of the combined cache with respect to the instruction or data cache allows to exploit better both spatial and temporal locality.
VACIO.
In Study 2, there will be fewer misses in the combined cache than the total number of misses in the split cache: Depending on the trace. VACIO.
In Study 2, when a simulation is run with trace TrazaS for the split cache, the total number of misses in cache is: 2 VACIO.
In Study 1, when a simulation is run with trace TrazaL for the multilevel cache, the resulting local miss rate (range 0 to 1) of the cache L1 is: 1 VACIO.
In Study 2, when a simulation is run with TrazaS for the combined cache, the number of compulsory misses is: 2 VACIO.
En el Estudio 2, el número de bloques en la caché de instrucciones
es:
4K bloques VACIO.
En el Estudio 2, las razones por las que TrazaS hace que la caché
separada ofrezca mejores prestaciones que la caché unificada son:
La caché separada almacena separadamente las instrucciones y
los datos, por lo que reduce los conflictos entre accesos a
instrucciones y accesos a datos respecto a la caché unificada.
VACIO.
En el Estudio 2, el número de bloques en la caché unificada es: 8 K bloques. VACIO.
En la parte 1 de la práctica, el número de páginas virtuales en el
sistema es: 16 VACIO.
En el Estudio 1, la caché multinivel tendrá igual o mejor tasa de
fallos global que la tasa de fallos de la caché mononivel: Siempre. VACIO.
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